1. Field
Example embodiments disclosed herein relate to semiconductor devices and methods of forming the same. Other example embodiments relate to nonvolatile memory devices and methods of forming the same.
2. Description of Related Art
As the integration of a semiconductor device increases, the width of patterns and spaces between the patterns are reduced. A reduction in the width of patterns, or in the spaces between the patterns, results in an increase in the costs associated with manufacturing a semiconductor device. Exposure equipment that uses a corresponding short wavelength may be necessary to form a pattern having a reduced line width. However, exposure equipment that produces a pattern having a reduced line width is costly, thereby increasing the costs associated with manufacturing the semiconductor device.
A reduction in the width of the patterns and the spaces of the patterns causes a variety of difficulties in manufacturing a semiconductor device. For example, a reduction in the space between gate patterns makes it difficult to form a source plug and a drain plug connected to a source electrode and a drain electrode, respectively, of a transistor. Because a bit line is formed to cross a source line, the bit line is not formed on the same layer as the source line. And, at least one of the bit line and the source line is connected to a drain electrode or a source electrode through plugs. In this case, a space between the gate patterns should be formed wide enough to prevent (or reduce the likelihood of) a short between a plug and a gate electrode. The necessity of wide space hinders the ability to form a more integrated semiconductor device.
In the case of a conventional NOR-type flash memory device, because the source electrodes are connected to one another through a buried source line, the number of source plugs may be reduced. Because the drain electrodes of cells are connected to a bit line through drain plugs, a NOR-type flash memory device has a lower degree of integration than a NAND-type flash memory device.
Methods that reduce the number of drain plugs have been studied.